1. Field of the Invention
The present invention generally relates to a liquid crystal display and a driving method thereof. More particularly, the present invention relates to the configuration of an active-matrix liquid crystal display suitable for high-definition display.
2. Description of the Related Art
In the art of liquid crystal displays (hereinafter sometimes abbreviated as LCDs) for use in a variety of electronic devices, the demand for improved image quality has increased, and high-definition displays have become more and more popular. In particular, in order to address the reduced pixel pitch and increased number of pixels in high-definition display, an LCD using a TFT active-matrix driving method in which a thin film transistor (hereinafter abbreviated as TFT) is used as a switching element in each pixel has been used. In one approach that has been proposed, a plurality of driver ICs allocate and apply image signals to multiple signal lines (source lines) from the upper and lower sides of a display region.
FIG. 3 illustrates an example configuration of a TFT-LCD of this type. An LCD 100 in this example includes a plurality of source lines 102 (S1, S2, . . . , S3m−1, S3m) and a plurality of gate lines 103 (G1, . . . , Gn) arranged in a matrix on a display region 101. Regions defined by the source lines 102 and the gate lines 103 correspond to pixels. A gate driver 104 (driver IC) for applying scanning signals to the gate lines 103 is mounted on the left side of the display region 101 shown in FIG. 3. On the upper and lower sides of the display region 101, source drivers 105 and 106 (driver ICs) for applying image signals to the source lines 102 are mounted, respectively. In this example, the plurality of source lines 102 are grouped into pairs, and source line pairs are alternately connected to the upper and lower source drivers 105 and 106, as shown in FIG. 3. For example, the leftmost pair of source lines 102 is connected to the lower source driver 106, the next horizontal pair of source lines 102 is connected to the upper source driver 105, and so on.
As used herein, the pitch between the adjacent source lines 102 is defined as pixel pitch P. If a single source driver were mounted on either side of a display region to drive all source lines, then the connection pitch between adjacent output terminals of the source driver would be equal to P. In the above-described configuration, however, the connection pitch P0 between adjacent output terminals of the source drivers 105 and 106 is approximately expressed as P0=2P since source line pairs are alternately connected to the source drivers 105 and 106, resulting in a wider connection pitch. The same is true if every other source line is alternately connected to upper and lower source drivers. This configuration facilitates the connection between the source drivers and the source lines even if the pixel pitch is considerably narrow.
For scanning of gate lines, as shown in FIG. 3 which illustrates n gate lines 103, a method (line-sequential driving method) of scanning and driving the n gate lines 103 one-by-one is generally employed. If the frame frequency is set at 60 Hz (i.e., the frames are refreshed 60 times per second), a time period during which a TFT connected to one gate line 103 is turned on, namely, the write time to required for an image signal to be written into one pixel, is approximately expressed by t0=(1/60)×(1/n).
As is illustrated in FIG. 3, in a conventional and practical configuration, the source lines 102 extend over the display region 101 in the vertical direction. If the parasitic capacitance for each pixel is expressed as C, then the parasitic capacitance of n pixels is loaded on a single source line. That is, the parasitic capacitance C0 of a single source line is found by C0=n×C.
Now, reference is made to the concept of “ease of writing of image signals at source drivers”. In general, the longer the write time, the more easily image signals are written, and the higher the parasitic capacitance in a source line, the less easily image signals are written. In other words, the ease of writing E at source drivers is proportional to the write time t while being inversely proportional to parasitic capacitance C of a source line, and is herein defined as E=t/C. This equation therefore corresponds to E0=t0/C0 in the conventional liquid crystal display shown in FIG. 3.
As previously described, recent TFT-LCDs have been incorporated in high-definition displays, thereby increasing the pixel density (the number of pixels per unit length or per unit area). The higher the pixel density, the narrower the pixel pitch, leading to a narrower connection pitch between drivers and LCD signal lines, thus making it difficult to connect therebetween. In particular, the pitch between source lines is inherently narrower than that between gate lines, and this problem is more noticeable. Such a configuration, in which multiple source lines are allocated to two source drivers, is fast approaching the upper limit of fabrication and connection technology.
Furthermore, increasing the number of pixels throughout the display reduces the write time per pixel while simultaneously increasing the parasitic capacitance on a single source line, thus reducing the ease of writing the image signals. Hence, the source drivers suffer from insufficient throughput and insufficient ability to drive electric current. Therefore, another problem exists in that more sophisticated and more expensive source drivers are required.